1. Field of the Invention
The present invention relates to a fabricating method of a semiconductor device. More particularly, the present invention relates to a method of forming an isolation region in a semiconductor substrate.
2. Description of the Related Art
An isolation region is formed in an integrated circuit for the purpose of separating neighboring device regions of a semiconductor substrate and preventing the carriers from penetrating through the substrate to neighboring devices. In a dynamic random access memory (DRAM) device, for example, the metal oxide semiconductor field effect transistors (MOSFETs) are isolated from each other by isolation regions in order to prevent current leakage among the MOSFETs. As the integration of the integrated circuit increases and the linewidth thereof decreases, it becomes desirable to use a shallow trench isolations (STI) in the integrated circuit.
A shallow trench isolation is commonly used in the manufacture of semiconductor device which is formed by anisotropically etching to form a trench in the substrate, depositing an isolation layer to fill the trench, performing a densification step, and then performing some follow-up steps to form an isolation region. In the above procedures for forming a shallow trench isolation, the densification step is performed with a temperature preferably higher than the glass transition temperature of the isolation layer in order to obtain a glass-like isolation layer which becomes flexible and rubber-like. In other words, the isolation layer becomes more compact after the densification step at a temperature higher than the glass transition temperature of the isolation layer. Additionally, in the densification step, the isolation layer releases the stress from the deposition step of forming the isolation layer.
In the conventional shallow trench isolation method, the isolation layer employed to fill the trench is a non-doped oxide. Since the glass transition temperature of the non-doped oxide layer is above approximately 1000.degree. C. The temperature of the densification step, such as an annealing process, must be above about 900.degree. C., and normally above about 1000.degree. C. However, the high temperature of densification step easily damages specific wafers, such as epitaxial silicon wafers, and increases the thermal budget of the fabricating process.